CE351 lec20 IR transmitter and receiver task 1 and task 2

Overview

CE351 lecture 20 explains how an Arduino Mega transmits one byte over infrared using UART framing, a 38 kHz PWM carrier, and an IR receiver connected to Serial1. It contrasts Task 1’s polling-based timing with Task 2’s Timer 3 interrupt state machine, showing how an LSB-first bit mask selects each data bit and how PWM on/off represents zero/one at the receiver.

Key takeaways

An IR UART link represents a zero by transmitting the PWM carrier, which makes the receiver output a low signal; turning the carrier off represents a one.
A UART byte frame consists of one start bit, eight data bits, and one stop bit, so the receiver must match the transmitter’s baud rate and sampling interval.
Task 1 implements bit timing by polling Timer 3 overflow, while Task 2 uses Timer 3 interrupts and transmission states to avoid blocking the main command logic.
A mask initialized to 0x01 selects the byte’s least-significant bit first; shifting it left after each bit advances through all eight data bits.
The PWM carrier frequency and UART bit rate serve different purposes: Timer 5 produces the roughly 38 kHz IR pulses, while Timer 3 sets the duration of each transmitted bit.

Chapters

0:00 Task 1 Byte Transmission: Send and Receive an ASCII Character

Task 1 and Task 2 each transmit one 8-bit character; Task 3 will handle strings of multiple characters.
The demonstration sends the character '5', whose ASCII value is hexadecimal 0x35, by pressing S and checks it with R.
The transmission sends each bit by turning the IR PWM carrier on or off.

5:00 Serial1 UART Reception and the One-Byte Buffer

The receiver module converts detected IR pulses into a pull-down signal connected to the board’s RX input.
A UART frame has a low start bit, eight data bits, and a stop bit; the receiver hardware samples the 10-bit frame at its configured baud rate.
Serial1 is used for the IR link, while Serial0 is tied to USB; the Mega supports the additional UART needed for this setup.
The received byte is stored in the UART receiver buffer before the R command reads and prints it.

10:00 UART Baud Rate Configuration and Timer Registers

Serial1.begin configures the receiver baud rate; the lecture uses 2400 bits per second for Task 1 and 1200 for Task 2, noting either can work when both ends match.
The UART baud-rate register is UBRRn, whose value is calculated from the desired rate and the microcontroller clock.
The transmitted bit duration must match the receiver’s baud rate, so the transmitter’s timer timing is coordinated with Serial1.

13:00 Timer 5 PWM Carrier and Timer 3 Polling Delay

Timer 5 generates the approximately 38 kHz PWM carrier on the OC5B output; ICR5 and OCR5B set carrier timing and compare behavior.
A turn-on-PWM code block configures Timer 5, while disabling the PWM output represents a logic one at the IR receiver.
Task 1 uses Timer 3 to create each UART bit interval: load a count offset, start the timer, poll TIFR3 for TOV3, stop the timer, and clear the overflow flag.
The polling delay holds each transmitted start, data, or stop bit for the duration required by the selected baud rate.

20:00 Task 1 Frame Construction with an LSB-First Mask

The transmitter first turns on PWM to produce the receiver’s low start bit for one Timer 3 interval.
A mask initialized to 0x01 isolates the least-significant bit of the character; the code sends bits LSB-first using data AND mask.
For each data bit, PWM off sends a one and PWM on sends a zero; the mask shifts left after each bit until all eight bits are handled.
After the data loop, PWM is turned off for a timed stop bit, completing the UART frame before the loop can send another character.

31:00 Polling Completion and the Task 2 Interrupt Approach

Task 1 repeats explicit Timer 3 delays and PWM operations for the start bit, eight data bits, and stop bit.
Task 2 moves transmission work into a Timer 3 interrupt service routine (ISR), avoiding repeated blocking delays in the command case.
A transmission flag stays false while idle and becomes true when the S command requests a character; the ISR checks that flag before transmitting.

37:00 Task 2 ISR Idle and Start-Bit States

The ISR uses states such as idle and transmit-data; idle checks whether a new character is waiting and otherwise exits without sending.
When transmission is requested, the state advances and the ISR turns on Timer 5 PWM to create the low start bit.
The PWM carrier is configured in setup but disabled initially; the lecture notes that re-enabling it in the ISR requires restoring the relevant configuration and compare-match settings.

40:30 Cadence Memory Compiler Setup and AI Troubleshooting Aside

A brief aside describes a legacy Cadence memory compiler for TSMC 180 that had required an old Solaris machine and specialized setup.
The instructor recalls spending about $950 on the machine, plus roughly $300 for a keyboard and $200 for a mouse, to support the older workflow.
A virtual-machine emulator was eventually configured in about two hours with iterative help from AI tools, replacing the need for the old physical machine.

44:00 Eight ISR Data-Bit Interrupts and Persistent Mask State

After the start-bit state, the transmit-data state runs for eight Timer 3 interrupts to send the byte’s eight bits.
The ISR tests the current data bit with data AND mask, turning PWM off for one and on for zero.
The mask must be initialized before entering the repeated data state; initializing it inside that state would reset it on every interrupt.
After each data bit is selected, the mask shifts left so the next interrupt processes the next bit.

48:00 ISR Stop Bit, Idle Return, and Friday Quiz Preparation

When the shifted mask reaches zero, all eight data bits are sent; the ISR turns PWM off to produce the stop bit and clears the transmission flag.
The state returns to idle so the ISR can wait for another S command and character.
The lecture closes by previewing a Friday quiz on IR material and a later lesson using interrupts for both transmission and reception of strings.

Summary, takeaways, and chapters were generated by AI from the video's transcript and may contain errors. The video belongs to its creator, Yiyan Li.