EE 2115-01 - Lec 21 - 2026_10_14

Overview

The lecture corrects earlier comparator and Schmitt-trigger diagrams, then applies first-order RC theory to delay circuits, capacitor responses to pulses, and filtering. It shows how the time constant τ = RC controls charging and discharging, how superposition analyzes rectangular pulses, and how fast periodic inputs make an RC output approach the input’s average DC value.

Key takeaways

A 100 μs comparator delay at a half-supply threshold requires τ ≈ 145 μs because the capacitor reaches half its final value after approximately 0.69τ.
For a pulse of amplitude VP and width Tpulse, the capacitor peak is VP(1 − e^(−Tpulse/τ)); a short pulse relative to τ therefore produces a reduced output peak.
A rectangular pulse is equivalent to a positive step plus a delayed negative step, allowing its RC response to be calculated with superposition in a linear network.
When periodic inputs arrive before full charge and discharge can occur, residual capacitor voltage accumulates; at sufficiently high frequency, the output approaches the input’s average DC value.
A capacitor’s slow discharge through a high resistance can provide brief power hold-up, as in the example of a dash cam remaining on after vehicle power is removed.

Chapters

0:00 Correcting Inverting Comparator and Schmitt-Trigger Interpretations

For an inverting comparator, when the negative input exceeds the positive input, the output should be low; the previously shown graph was incorrect.
The Schmitt-trigger explanation concerns input magnitude relative to the reference: below the threshold the output switches high, and above it the output switches low.
The Schmitt-trigger diagram was confirmed as correct, unlike the inverting-comparator graph.

2:30 First-Order RC Circuits and a 100-Microsecond Delay Design

RC and RL circuits are first-order systems because one energy-storage element produces a first-order differential equation; multiple storage elements can yield second-order behavior.
The general transient solution uses the initial value, final value, and time constant τ = RC.
For a 100 μs delay with a 5 V step and a half-supply comparator threshold, the design uses 100 μs / 0.69 ≈ 145 μs for τ.
Example component choices include 100 kΩ with about 1.5 nF or 110 kΩ with about 1.3 nF; the simulated delay is approximately 106 μs.

9:38 RC Problem Types, Component Selection, and Current Calculation

Typical exercises ask for R and C to meet a specified time constant or output, or ask for one component when the other and a target time are given.
Current can be found with Ohm’s law when voltage and resistance are known, or with Kirchhoff’s Current Law when the circuit structure calls for it.
Component selection in the example ignores practical constraints such as temperature, pressure, and current limits; real designs must account for them.

13:45 Using Superposition to Analyze a Rectangular Input Pulse

A rectangular pulse can be represented as a positive step followed, after the pulse width, by a delayed negative step of equal magnitude.
Superposition adds the capacitor’s positive-step charging response to its delayed negative-step response to produce the pulse response.
The method applies because the resistor-capacitor network is linear and time-invariant; the input sources are analyzed separately and their outputs summed.

18:44 Capacitor Peak Voltage When Pulse Width Is Shorter Than τ

When pulse width Tpulse is less than the time constant τ, the input ends before the capacitor can reach the input voltage.
During charging, the capacitor voltage follows VC(t) = VP(1 − e^(−t/τ)); at the end of the pulse, Vpeak = VP(1 − e^(−Tpulse/τ)).
The time constant sets the charging rate, so a larger τ relative to Tpulse produces a smaller capacitor peak.

22:00 Repeated Pulses, Residual Charge, and Measuring an Unknown τ

With a continuous square-wave input, the next pulse may arrive before the capacitor fully charges or discharges, leaving residual voltage between cycles.
An example uses 10 kΩ and 10 nF for τ = 100 μs, with a 300 μs pulse; the lecture reports a capacitor peak of about 950 mV.
An unknown first-order system’s time constant can be estimated by applying a pulse of known width, measuring its peak response, and solving the peak-voltage equation.
The lecture also relates the input pulse’s area, VP × Tpulse, to the capacitor’s eventual decaying response.

29:40 High-Frequency RC Filtering and the Average-Value Limit

For a periodic rectangular input, the average DC value is the pulse area over one period; increasing frequency reduces the period and pulse width.
When the input changes faster than the RC circuit can respond, capacitor peaks shrink and the voltage no longer reaches the input’s high and low levels.
At sufficiently high frequency relative to τ, the capacitor output becomes nearly flat and approaches the waveform’s average DC value.
LTspice comparisons with a 100 kΩ resistor and 1 nF, 3.3 nF, and 10 nF capacitors show progressively flatter responses as capacitance and τ increase.

37:15 RC Charge Retention in Dash Cams and Modulated Signals

A single pulse can produce an asymmetric waveform: charging may be relatively quick while discharge through a high resistance takes much longer.
A dash cam can remain on briefly after the vehicle is switched off because its capacitor discharges slowly through a high-resistance path.
An RC circuit can preserve the envelope of an amplitude-modulated sine-wave input even when the signal is not a perfect DC waveform.

Summary, takeaways, and chapters were generated by AI from the video's transcript and may contain errors. The video belongs to its creator, Hiren Trada.