Introduction to Logic Circuit Design (University of Utah) - Multiplexers (Lecture 12)
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Overview
The lecture develops multiplexers as combination-logic building blocks: a select signal chooses which data input reaches the output, and n select signals can address 2^n inputs. It then shows how a multiplexer can implement Boolean functions, using two-variable XOR as an example and demonstrating how truth-table rows can be grouped by a chosen select variable to derive the data inputs.
Key takeaways
- A 2:1 multiplexer implements a conditional choice: its select signal determines which of two data inputs appears at the output.
- An n-select-line multiplexer supports 2^n data inputs, so four select lines can choose among 16 inputs.
- A two-input XOR can be built with one 2:1 mux by selecting on one variable and supplying the other variable and its complement as data inputs.
- The select-variable choice affects the mux wiring, but alternative mux configurations can implement the same Boolean function.
- To map a truth table to a mux, partition its rows according to the select signal and express each data input using the remaining variables.
Chapters
- A 2:1 multiplexer has two data inputs, one select signal, and one output.
- The select value determines whether the output follows the first or second data input.
- A truth table can describe the mux behavior and be translated into a Boolean expression or logic circuit.
- With n select signals, a multiplexer can choose among 2^n data inputs.
- A 4:1 mux uses 2 select signals, while 4 select signals can address 16 inputs.
- The same selection principle extends from single-bit signals to choosing among wider data values.
- The two-variable XOR function outputs 1 when its inputs differ and 0 when they match.
- A 2:1 mux can implement XOR by using one variable as the select signal and the other variable and its complement as data inputs.
- Choosing a different select variable can produce a different mux arrangement for the same XOR truth table.
- For a general truth table, group rows by a chosen control variable and derive the mux data inputs from the remaining variables.
Transcript excerpt
0:09 So our chapter is combination logic circuits. So far it was combination logic circuits but we want to take a little bit better look into them. So it's nothing that much new material just restuding what we have been working on. So there are multiple things that we are we get more familiar one of the main concepts is multiplexers so we have we know multiplexers we have used it but we wan take a much deeper study okay do you remember that we have been talking about multiplexer say that the idea of multiplexer is we can choose something based on this controlling signal so the easiest the simplest multiplexer which
0:59 Bit m contr signal and input in signal signal out of the contr value conn the x1 s is f would be the value of whatever that is connected pin
1:51 number and here is x2 So now I can choose between x1 and x2 that each one i choose basically all right and if remember we talked about that okay this is not a tr this isunality table we need to convert that order to be able to dra and how can we do that need to translate in 3 bit X12 S12
2:44 F1 Similar number would need all the way through that to
3:38 function couldn't I have it easier more logical the official way is join the truth table and then the car up and everything but can I say that in a more intuitive S [گلویش را صاف میکند]
4:24 دم زد او x1 sun xib other s او او can I can have bits of controlling the same idea when I have bits of control I
5:16 can control bits I can choose among bits input when s2 ز a s input b so bit of contr and power in always
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